Version 4 SHEET 1 1112 680 WIRE -1264 48 -1264 32 WIRE -1264 448 -1264 400 WIRE -1200 -48 -1264 -48 WIRE -1200 176 -1264 176 WIRE -1184 320 -1264 320 WIRE -1072 320 -1184 320 WIRE -1024 32 -1056 32 WIRE -976 -48 -1200 -48 WIRE -976 -32 -976 -48 WIRE -976 64 -976 48 WIRE -864 -16 -896 -16 WIRE -816 -48 -976 -48 WIRE -816 -32 -816 -48 WIRE -768 -48 -816 -48 WIRE -688 48 -816 48 WIRE -688 48 -688 -48 WIRE -496 320 -992 320 WIRE -416 320 -496 320 WIRE -400 432 -400 368 WIRE -368 -48 -688 -48 WIRE -368 64 -976 64 WIRE -368 64 -368 32 WIRE -368 208 -368 144 WIRE -368 272 -368 208 WIRE -304 208 -368 208 WIRE -160 64 -160 32 WIRE -160 176 -160 144 WIRE 80 -48 -160 -48 WIRE 80 0 80 -48 WIRE 80 176 80 80 WIRE 224 -48 80 -48 WIRE 224 0 224 -48 WIRE 224 176 224 64 WIRE 288 -48 224 -48 FLAG -1264 128 0 FLAG -1200 -48 B_PLUS FLAG -1200 176 vsw FLAG -1264 256 0 FLAG -1264 528 0 FLAG -1184 320 grid_bias FLAG -400 432 0 FLAG -496 320 grid FLAG -1056 32 vsw FLAG -896 -16 vsw FLAG -864 32 0 FLAG -1024 -16 0 FLAG -160 176 0 FLAG 288 -48 load FLAG 80 176 0 FLAG 224 176 0 FLAG -304 208 anode SYMBOL voltage -1264 -64 R0 WINDOW 0 33 34 Left 0 WINDOW 3 33 62 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value SINE(0 {vquies} 100 0 0 -90 7.25) SYMBOL voltage -1264 32 R0 WINDOW 0 30 36 Left 0 WINDOW 3 34 70 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value {{vquies} + {rpri}*{iquies}} SYMBOL voltage -1264 304 R0 WINDOW 0 33 37 Left 0 WINDOW 3 35 73 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value PWL(0 {{vbias}+3*{stepsize}} 10m {{vbias}+3*{stepsize}} 10.01m {{vbias}+2*{stepsize}} 20m {{vbias}+2*{stepsize}} 20.01m {{vbias}+{stepsize}} 30m {{vbias}+{stepsize}} 30.01m {vbias} 40m {vbias} 40.01m {{vbias}-{stepsize}} 50m {{vbias}-{stepsize}} 50.01m {{vbias}-2*{stepsize}} 60m {{vbias}-2*{stepsize}} 60.01m {{vbias}-3*{stepsize}} 70m {{vbias}-3*{stepsize}} 70.01m {vbias}) SYMBOL voltage -1264 432 R0 WINDOW 0 35 40 Left 0 WINDOW 3 36 70 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V4 SYMATTR Value SINE(0 {sig_amp} {sig_freq} .1) SYMBOL voltage -1264 160 R0 WINDOW 0 35 29 Left 0 WINDOW 3 36 61 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V5 SYMATTR Value PWL(0 1 75m 1 75.1m -1) SYMBOL res -976 304 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R1 SYMATTR Value {source_r} SYMBOL Misc\\triode_dd -368 320 R0 WINDOW 0 60 -16 Left 0 WINDOW 38 60 12 Left 0 SYMATTR InstName U1 SYMATTR SpiceModel 801a SYMBOL sw -976 -48 R0 WINDOW 0 -19 -27 Left 0 WINDOW 3 -28 -54 Left 0 SYMATTR InstName S1 SYMATTR Value SWIT SYMBOL sw -816 -48 R0 WINDOW 0 -20 -30 Left 0 WINDOW 3 -23 -60 Left 0 SYMATTR InstName S2 SYMATTR Value SWIT SYMBOL current -768 -48 R270 WINDOW 0 51 34 VTop 0 WINDOW 3 57 59 VBottom 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName I1 SYMATTR Value {iquies} SYMBOL ind2 -384 -64 R0 WINDOW 0 36 25 Left 0 SYMATTR InstName L1 SYMATTR Value 150 SYMATTR Type ind SYMBOL ind2 -176 -64 R0 WINDOW 0 39 30 Left 0 SYMATTR InstName L2 SYMATTR Value 150 SYMATTR Type ind SYMBOL res -384 48 R0 SYMATTR InstName R2 SYMATTR Value {rpri} SYMBOL res -176 48 R0 SYMATTR InstName R3 SYMATTR Value 400 SYMBOL res 64 -16 R0 SYMATTR InstName R4 SYMATTR Value {rload} SYMBOL cap 208 0 R0 SYMATTR InstName C1 SYMATTR Value {cload} TEXT -392 -112 Left 0 ;Generic Curve Plot / Transient Analysis setup TEXT -1304 -88 Left 0 ;Sources: TEXT 568 -88 Left 0 ;Parameters: TEXT 432 -56 Left 0 !.param vquies=500 TEXT 664 -56 Left 0 ;Set to quiescent plate voltage TEXT 664 -32 Left 0 ;Set to transformer primary resistance TEXT 432 -32 Left 0 !.param rpri=400 TEXT 432 -8 Left 0 !.param iquies=40m TEXT 664 -8 Left 0 ;Set to quiescent plate current TEXT 432 16 Left 0 !.param vbias=-32 TEXT 664 16 Left 0 ;Set to bias voltage required for TEXT 696 40 Left 0 ;your chosen operating point. TEXT 432 64 Left 0 !.param stepsize=20 TEXT 664 64 Left 0 ;Set to volts per step for tube curves TEXT 432 88 Left 0 !.param source_r=10 TEXT 664 88 Left 0 ;Set to grid source resistance. TEXT -866 456 Left 0 !.tran 0 .11 0 1e-6 TEXT 432 136 Left 0 !.param sig_amp=90 TEXT 664 136 Left 0 ;Signal amplitude for loadline (peak) TEXT 432 160 Left 0 !.param sig_freq=1k TEXT 664 160 Left 0 ;Test Frequency TEXT 480 208 Left 0 !;.step param sig_amp list 50 70 90 110 TEXT 896 208 Left 0 ;amplitude steps TEXT 440 184 Left 0 ;Stepping options TEXT 480 232 Left 0 !;.step param sig_freq list 100 500 1000 5000 10000 TEXT 1016 232 Left 0 ;freqs TEXT 632 184 Left 0 ;(remove ; to activate step) TEXT -1272 568 Left 0 ;Test signal starts at t=100msec. TEXT -1232 32 Left 0 ;Plate supply TEXT -1240 240 Left 0 ;Curves/Test signal switch TEXT -1232 416 Left 0 ;Grid Supply TEXT 424 576 Left 0 !.model SWIT SW (Ron=.1 Roff=10meg Vt=0) TEXT -344 -16 Left 0 !K1 L1 L2 .99995 TEXT -328 48 Left 0 ;transformer TEXT 432 288 Left 0 !.param rload=10k TEXT 672 288 Left 0 ;Load resistance TEXT 432 312 Left 0 !.param cload=100p TEXT 672 312 Left 0 ;Load capacitance TEXT -752 80 Left 0 ;Closed during curves TEXT -656 -64 Left 0 ;B+ during test signal TEXT -656 -32 Left 0 ;Quiescent current during TEXT -624 -8 Left 0 ;curves. TEXT -864 480 Left 0 ;For FFT, the sim time needs to provide sufficient number of cycles. TEXT -864 504 Left 0 ;For plotting the loadline a few cycles are just fine. TEXT -864 528 Left 0 ;Edit simulation stop time accordingly.